EMSOFT 2006: 6th ACM & IEEE International Conference on Embedded Software
Design and Implementation of Embedded Software
Time-Triggered Implementations of Dynamic Controllers
Efficient Distributed Deadlock Avoidance with Liveness Guarantees
A Memory-Optimal Buffering Protocol for Preservation of Synchronous Semantics Under Preemptive Scheduling
Component-Based Development and Software Engineering
Real-Time Interfaces for Composing Real-Time Systems
A Causality Interface for Deadlock Analysis in Dataflow
Towards a Formal Foundation for Domain Specific Modeling Languages
Defining a Strategy to Introduce a Software Product Line using Existing Embedded Systems
Modeling of Synchronous Systems
Mixing Signals and Modes in Synchronous Data-Flow Systems
Polychronous Mode Automata
A Timing Model for Synchronous Language Implementations in Simulink
Networked Embedded Software
S2DB: a Novel Simulation-Based Debugger for Sensor Network Applications
Multi-Level Software Reconfiguration for Sensor Networks
An Analysis Framework for Network-Code Programs
Concurrent Real-Time Programming
A Hierarchical Coordination Language for Interacting Real-Time Tasks
Scheduling-Independent Threads and Exceptions in SHIM
Communication by Sampling in Time-Sensitive Distributed Systems
Software Support for Portable Storage
A Superblock-Based Flash Translation Layer for NAND Flash Memory
Energy-Efficient File Placement Techniques for Heterogeneous Mobile Storage Systems
Reliability Mechanisms for File Systems using Non-Volatile Memory as a Metadata Store
Compiling and Program Transformations
Efficient Exception Handling in Java Bytecode-to-C Ahead-of-Time Compiler for Embedded Systems
Schedulable Persistence System for Real-Time Applications in Virtual Machine
Implementing Fault-Tolerance in Real-Time Systems by Automatic Program Transformations
Energy adaptation and optimization
Energy-Efficient Dynamic Memory Allocators at the Middleware Level of Embedded Systems
Energy Adaptation for Multimedia Information Kiosks
Compiler-Assisted Leakage Energy Optimization for Clustered VLIW Architectures
Modeling and Validation
Analysis of the Zeroconf Protocol using UPPAAL
Reusable Models for Timing and Liveness Analysis of Middleware for Distributed Real-Time and Embedded Systems
Software Partitioning for Effective Automated Unit Testing
Scheduling and Execution Time Analysis
Incremental Schedulability Analysis of Hierarchical Real-Time Components
Scheduling for Multi-Threaded Real-Time Programs via Path Planning
Modeling a System Controller for Timing Analysis
Architectures and Performance Analysis
New Approach to Architectural Synthesis: Incorporating QoS Constraint
Formal Performance Evaluation of AMBA-Based System-on-Chip Designs
Scratchpad Memory Management for Portable Systems with a Memory Management Unit